1. Field of the Invention
The embodiments of the invention generally relate to chip design and fabrication and, more specifically, to a method of designing a chip to optimize yield as a function of multiple metrics (e.g., performance, power consumption, etc.) and further to maximize profit potential.
2. Description of the Related Art
In conventional chip design and fabrication, Statistical Static Timing Analysis (SSTA) can be used to determine the parametric yield of a designed chip as a function of chip performance (i.e., the fraction or percentage of chips that are able to be manufactured and that can achieve pre-defined performance limits, such as clock frequency limits). To accomplish this, the dependence of chip performance on multiple different process parameter variations can be analyzed and a joint probability distribution can be calculated. Based on this joint probability distribution, a yield-performance curve can be generated. Design changes can then be made in order to optimize yield as a function of performance. Additionally, a similar analysis technique can used to determine the parametric yield of the same designed chip as a function of some different metric, for example, power consumption (i.e., the fraction or percentage of chips that are able to be manufactured and that can achieve pre-defined power consumption limits). To accomplish this, the dependence of chip power consumption on multiple different process parameter variations can be analyzed and a joint probability distribution can be calculated. Based on this joint probability distribution, a yield-power consumption curve can be generated. Again, design changes can then be made in order to optimize yield as a function of this metric. However, because the different metrics (e.g., performance, power consumption, etc.) may have different sensitivities to different process variations, making design changes to optimize yield as a function of one metric may result in a reduction in yield as a function of another metric and vice versa. Furthermore, design changes required to optimize yield as a function of any metric may not be cost-efficient.